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Announcement

CHIPS Alliance Builds Momentum and Community with Newest Members Imperas Software and Metrics

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Imperas and Metrics joining CHIPS Alliance to help drive the verification of RISC-V Open ISA implementations

SAN FRANCISCO – June 18, 2019 – CHIPS Alliance, the leading consortium advancing common, open hardware for interfaces, processors and systems, today announced Imperas and Metrics are joining the organization and the Verification Working Group. Imperas is an independent provider of processor simulation technology and tools for virtual platforms and
analysis tools for multicore SoC software development. Metrics leads the cloud-based solutions for SoC designers with hardware simulation for both design management flexibility and on-demand capacity. The CHIPS Alliance welcomes Imperas and Metrics among its current members Antmicro, Esperanto Technologies, Google, SiFive, Western Digital.

CHIPS Alliance is a project hosted by the Linux Foundation to foster a collaborative environment to accelerate the creation and deployment of open SoCs, peripherals and software tools for use in mobile, computing, consumer electronics, and Internet of Things (IoT) applications. The CHIPS Alliance project hosts and curates high-quality open source Register Transfer Level (RTL) code relevant to the design of open source CPUs, RISC-V- based SoCs, and complex peripherals for Field Programmable Gate Arrays (FPGAs) and custom silicon.

Imperas provides reference processor models for verification of processors and SoC’s and will be contributing to the CHIPS Alliance working group on verification. Planned contributions will include enhanced interfaces and design flow methodologies to the riscvOVPsim ISS (Instruction Set Simulator) for RISC-V processor IP verification and compliance. riscvOVPsim is free and available for download on GitHub as part of the latest RISC-V compliance test suite and framework, available on GitHub at https://github.com/riscv/riscv-compliance

Metrics is the first cloud platform for ASIC and complex FPGA design verification. The company provides design teams with on-demand simulation resources, a modern continuous integration workflow, a pricing by-the-minute business model and unique development flexibility. Metrics develops innovative products powered by a cross-functional team that includes simulation technologists, IC design verification experts, and modern cloud software developers.

“Within the RISC-V community and ecosystem Imperas has made many contributions to customer and community projects and also released a free RISC-V reference simulator on GitHub, while Metrics has pioneered a cloud-based approach that enables infinite hardware simulation capacity that changes the nature of semiconductor verification use models,” said
Zvonimir Bandic, senior director of next-generation platforms architecture at Western Digital and Chairman, CHIPS Alliance. “With Imperas joining CHIPS Alliance we welcome their contributions within the verification task group to help the industry wide efforts to ensure quality IP is available to all adopters of RISC-V. Metrics’ contributions to verification
infrastructure will provide a modern approach to RISC-V cores, peripherals, and complex IP block development.”

“Imperas is pleased to join the CHIPS Alliance and support the continuing efforts to improve verification for all RISC-V implementers and SoC designers,” said Simon Davidmann, CEO of Imperas Software. “Open ISA’s are enabling new approaches and innovations in processor architectures that will require broad community support to address the verification challenges of next generation domain specific optimized devices.”

“Metrics was founded with an open platform philosophy that has allowed the company to form many valuable relationships that drive next-generation verification approaches,” said Doug Letcher, CEO, Metrics. “In joining CHIPS Alliance, we are excited to help and support industry wide collaborations for verification that are essential for the next generation
of devices.”

“CHIPS Alliance has seen a tremendous wave of interest and support since it was first announced just a few months ago,” said Ted Marena, Interim Director CHIPS Alliance. “We are pleased to welcome Imperas and Metrics as its latest members and both will be in attendance at the inaugural workshop on June 19, 2019 at Google at 111 W. Java Drive, Sunnyvale, Calif.”

The CHIPS Alliance community includes technology developers and contributors supported by a Board of Directors and a Technical Steering Committee. Its initial plans focus on establishing a curation process aimed at providing the FPGA and chip community access to high-quality, enterprise grade hardware.

About Imperas
Imperas is revolutionizing the development of embedded software and systems and is the leading provider of RISC-V processor models and virtual prototype solutions. Imperas, along with Open Virtual Platforms (OVP), promotes open source model availability for a spectrum of processors, IP vendors, CPU architectures, system IP and reference platform models of
processors and systems ranging from simple single core bare metal platforms to full heterogeneous multi-core systems booting SMP Linux. All models are available from Imperas at www.imperas.com and the Open Virtual Platforms (OVP) website.

About Metrics
Metrics, headquartered in Ottawa, Ontario, Canada, is the first true cloud-based platform for ASIC and complex FPGA Design Verification. The Metrics Platform provides an infinitely scalable design verification workflow together with advanced simulation technology, which reduces infrastructure waste and enables better engineering efficiency.https://metrics.ca/

About the Linux Foundation
Founded in 2000, the Linux Foundation is supported by more than 1,000 members and is the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Linux Foundation’s projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation’s
methodology focuses on leveraging best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, please visit us at linuxfoundation.org.

The Linux Foundation has registered trademarks and uses trademarks. For a list of trademarks of the Linux Foundation, please visit our trademark usage page at https://www.linuxfoundaton.org/trademark-usage. Linux is a registered trademark of Linus Torvalds.

CHIPS Alliance to Reveal Project Details, Strategy and Roadmap at Inaugural Workshop Hosted at Google

By | Announcement

SAN FRANCISCO –  May 7, 2019 – CHIPS Alliance, the leading consortium advancing common, open hardware for interfaces, processors and systems, today announced it is holding its inaugural workshop on June 19, 2019 at Google at 111 W. Java Drive, Sunnyvale, Calif.

Project details, strategy and roadmaps will be presented by member companies, and attendees will have an opportunity to propose Register Transfer Level (RTL) projects and development flow ideas. The workshop will focus on open source hardware, software tools, RTL development, design verification tools and related topics. The agenda and registration details are available at https://events.linuxfoundation.org/events/chips-alliance-workshop-2019

“This workshop at Google will kick off CHIPS Alliance hardware RTL development. The organization will discuss the planned projects, what is needed for accelerated open source hardware and key software tools. Attendees will see the potential of CHIPS Alliance and the vision for what we will deliver,” said Dr. Zvonimir Bandic, Western Digital and Chairman of the CHIPS Alliance Foundation.

“Workshop attendees will learn more about our organization and the open source hardware, verification flows/tools and software we will be developing. Attendees will also have an opportunity to suggest projects and meet with CHIPS Alliance members and the Board of Directors. We look forward to answering questions, discussing ideas and sharing the aspirations of the group,” said Dr. Richard Ho, Google and Board member of the CHIPS Alliance Foundation.

CHIPS Alliance members include Antmicro, Esperanto Technologies, Google, SiFive and Western Digital. The Alliance is a collaborative forum designed to accelerate the creation and deployment of more efficient and flexible CPUs, SoCs and complex peripherals for FPGAs and custom silicon. It is supported by a Board of Directors and a Technical Steering Committee.

CHIPS Alliance Inaugural Workshop Agenda

  • 9:00   Introduction to CHIPS Alliance (Zvonimir Bandic)
  • 9:15   Why open source hardware unlocks innovation (Martin Fink)
  • 9:40      Federation: An Open-Source Chip Design Workflow  (Yunsup Lee)
  • 10:05    Collaborative end to end Design Verification Flow  (Richard Ho)
  • 10:30  Break
  • 11:00  RISC-V SweRV Core contribution (Zvonimir Bandic)
  • 11:20  Open Source Tools: cocotb and Verilator support  (Michael Gielda)
  • 11:40  Verilator and Test Bench Environment roadmap (Wilson Snyder)
  • 12:00  Lunch
  • 1:00    A natural fit, RISC-V with CHIPS Alliance (Naveed Sherwani)
  • 1:25    BooM v2 coordination with UC Berkeley (Dave Ditzel)
  • 1:50    Audience Participation – What RTL IP do you want to be designed?
  • 2:30   Break
  • 3:00   Blue Cheetah Framework for Rapid IP Design (Krishna Settaluri)
  • 3:25   FuseSoC support for SweRV (Olof Kindgren)
  • 3:40   Chisel and FIRRTL  (Yunsup Lee)
  • 4:00   Why join CHIPS Alliance? (Ted Marena)

 

About The Linux Foundation
Founded in 2000, the Linux Foundation is supported by more than 1,000 members and is the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Linux Foundation’s projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation’s methodology focuses on leveraging best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, please visit us at linuxfoundation.org.

 

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The Linux Foundation has registered trademarks and uses trademarks. For a list of trademarks of the Linux Foundation, please visit our trademark usage page at https://www.linuxfoundaton.org/trademark-usage. Linux is a registered trademark of Linus Torvalds.

Open Hardware Group – CHIPS Alliance – Building Momentum and Community with Newest Member Antmicro

By | Announcement

Antmicro Joins CHIPS Alliance to develop open source cores, IP blocks and tools for CPUs, RISC-V-based SoCs and peripherals

SAN FRANCISCO –  April 18, 2019 – CHIPS Alliance, the leading consortium advancing common, open hardware for interfaces, processors and systems, today announced Antmicro is joining the organization. Antmicro is a software-driven technology company focused on introducing open source into strategic areas of industry, especially edge AI. Announced just last month, the CHIPS Alliance welcomes Antmicro among its initial members Esperanto Technologies, Google, SiFive, and Western Digital.

CHIPS Alliance is a project hosted by the Linux Foundation to foster a collaborative environment to accelerate the creation and deployment of more efficient and flexible CPUs, SoCs, and peripherals for use in mobile, computing, consumer electronics, and Internet of Things (IoT) applications. The CHIPS Alliance project hosts and curates high-quality open source Register Transfer Level (RTL) code relevant to the design of open source CPUs, RISC-V-based SoCs, and complex peripherals for Field Programmable Gate Arrays (FPGAs) and custom silicon. Members are committed to both open source hardware and continued momentum behind the free and open RISC-V architecture.

“The RISC-V Foundation directs the standards and promotes the adoption of the open and free Instruction Set Architecture. This enables organizations to innovate for the next generation of hardware development. CHIPS Alliance is a natural extension for companies and universities who want to collaborate and create RTL based on RISC-V and related peripherals,” said Calista Redmond, CEO of the RISC-V Foundation.

“Antmicro believes in open source collaboration around portable, extendible and vendor-neutral technologies, which we consider a strong foundation for transparent, shared development processes based on good practices. We’re joining CHIPS Alliance because it is the conduit through which we can all realize the vision of open source RTL designs for silicon and FPGAs,” said Peter Gielda, CEO of Antmicro.

The CHIPS Alliance community includes technology developers and contributors supported by a Board of Directors and a Technical Steering Committee. Its initial plans focus on establishing a curation process aimed at providing the FPGA and chip community access to high-quality, enterprise grade hardware.

About Antmicro

Antmicro (www.antmicro.com) is a software-driven tech company developing advanced open source-based cyber-physical and edge AI systems. Antmicro provides open software, hardware, tooling, new development methodologies and applied R&D to customers worldwide, accelerating new product development and adoption of modern computing platforms, both CPU/ASIC, GPU and FPGA-based. A Platinum Founding Member of the RISC-V Foundation, Antmicro supports, uses, contributes to and helps promote a broad range of open source technologies such as RISC‑V, Renode, Tensorflow, Zephyr, Linux and Android.

About The Linux Foundation

Founded in 2000, the Linux Foundation is supported by more than 1,000 members and is the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Linux Foundation’s projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation’s methodology focuses on leveraging best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, please visit us at linuxfoundation.org.

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The Linux Foundation has registered trademarks and uses trademarks. For a list of trademarks of the Linux Foundation, please visit our trademark usage page at https://www.linuxfoundaton.org/trademark-usage. Linux is a registered trademark of Linus Torvalds.

MEDIA CONTACTS

Jill Lovato

The Linux Foundation

jlovato@linuxfoundation.org

Linux Foundation to Host CHIPS Alliance Project to Propel Industry Innovation Through Open Source CPU Chip and SoC Design

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New Linux Foundation Project to Foster Flexible, Next-Generation Chip Design for Diverse Data-Centric Applications and Workloads

SAN FRANCISCO –  March 11, 2019 – The Linux Foundation, the nonprofit organization enabling mass innovation through open source, today announced its intent to form the CHIPS Alliance project to host and curate high-quality open source code relevant to the design of silicon devices. CHIPS Alliance will foster a collaborative environment that will enable accelerated creation and deployment of more efficient and flexible chip designs for use in mobile, computing, consumer electronics, and Internet of Things (IoT) applications.

Early CHIPS Alliance backers include Esperanto Technologies, Google, SiFive and Western Digital, all committed to both open source hardware and continued momentum behind the free and open RISC-V architecture.

“The RISC-V community is working to foster open source foundation technologies that will help unlock market innovation to move [artificial intelligence/machine learning and infrastructure composability] forward,” said Eric Burgener, research vice president of IDC’s Infrastructure Systems, Platforms, and Technologies Group, via a recent IDC report.

The project will create an independent entity so companies and individuals can collaborate and contribute resources to make open source CPU chip and system-on-a-chip (SoC) design more accessible to the market.

“Open collaboration has repeatedly proven to help industries accelerate time to market, achieve long-term maintainability, and create de facto standards,” said Mike Dolan, vice president of strategic programs, the Linux Foundation.  “The same collaboration model applies to the hardware in a system, just as it does to software components. We are eager to host the CHIPS Alliance and invite more organizations to join the initiative to help propel collaborative innovation within the CPU and SoC markets.”

“As new workloads surface every day, we need new silicon designs in order to optimize processing requirements,” said Martin Fink, interim CEO of RISC-V Foundation and executive vice president and CTO of Western Digital. “Today’s legacy general-purpose architectures are, in some cases, decades old.  With the creation of the CHIPS Alliance, we are expecting to fast-track silicon innovation through the open source community.”

CHIPS Alliance will follow governance practices consistent with other Linux Foundation projects, which will include a Board of Directors, a Technical Steering Committee, and community contributors who will work collectively to manage the project. Initial plans will focus on establishing a curation process aimed at providing the chip community with access to high-quality, enterprise grade hardware.

PLANNED CONTRIBUTIONS

Google

Google is planning to contribute a Universal Verification Methodology (UVM)-based instruction stream generator environment for RISC-V cores. The environment provides configurable, highly stressful instruction sequences that can verify architectural and micro-architectural corner-cases of designs.

Western Digital

Western Digital is planning to contribute their high performance, 9-stage, dual issue, 32-bit SweRV Core, together with a test bench, and high-performance SweRV Instruction set simulator. Additional contribution will be specification and early implementations of OmniXtend cache coherence protocol.

SiFive

SiFive was founded by the inventors of the free and open RISC-V Instruction Set Architecture, who, together with their colleagues at UC Berkeley, developed the first open source RISC-V microprocessors and a new open source hardware description language Chisel. This initial work at UC Berkeley also developed the RocketChip SoC generator, including the initial version of the TileLink coherent interconnect fabric.

SiFive remains committed to maintaining and improving the RocketChip SoC generator and the TileLink interconnect fabric in opensource as a member of the CHIPS Alliance, and contributing to Chisel and the FIRRTL intermediate representation specification and transformation toolkit. SiFive will also contribute and maintain Diplomacy, the SoC parameter negotiation framework.

To learn more about CHIPS Alliance, please visit www.chipsalliance.org.

SUPPORTING QUOTES

Esperanto Technologies

“Intellectual property for VLSI chip designs ought to be able to reap similar benefits as open source software has for years. We hope that the CHIPS Alliance will be a catalyst where all hardware designers feel comfortable both contributing and finding useful designs for their projects,” said Dave Ditzel, founder and CEO of Esperanto Technologies, Inc.

Google

“We are entering a new golden age of computer architecture highlighted by accelerators, rapid hardware development and open source architecture and implementations. Google is committed to fostering an open community of collaboration and innovation in both hardware and software,” said Dr. Amir Salek, senior director, Technical Infrastructure, Google Cloud. “TheCHIPS Alliance will provide the support and framework needed to nurture a vibrant open source hardware ecosystem for high-quality, well-verified and documented components to accelerate and simplify chip design.”

SiFive

“Semiconductor design starts have evaporated due to the skyrocketing cost of building a custom SoC,” said Dr. Yunsup Lee, co-founder and CTO, SiFive. “A healthy, vibrant semiconductor industry needs a significant number of design starts, and the CHIPS Alliance will fill this need. SiFive is excited to continue to work on and contribute to the RocketChip SoC generator, TileLink, Chisel, and FIRRTL projects as we push the boundaries of open source innovation.”

Western Digital

“The data-centric universe continues to grow and expand in ways many of us never imagined,” said Dr. Zvonimir Bandic, senior director of next generation platforms architecture at Western Digital, a co-founder of RISC-V as well as CHIPS Alliance. “The CHIPS Alliance will provide access to an open source silicon solution that can democratize key memory and storage interfaces and enable revolutionary new data centric architectures. It paves the way for a new generation of compute devices and intelligent accelerators that are close to the memory and can transform how data is moved, shared, and consumed across a wide range of applications. By extending Western Digital’s commitment to the RISC-V architecture and instruction set, and teaming up with fellow industry leaders to form the CHIPS Alliance, we make another important stride forward toward unlocking the true potential of the data.”

About the Linux Foundation

Founded in 2000, the Linux Foundation is supported by more than 1,000 members and is the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Linux Foundation’s projects are critical to the world’s infrastructure including Linux, Kubernetes, Node.js, and more.  The Linux Foundation’s methodology focuses on leveraging best practices and addressing the needs of contributors, users and solution providers to create sustainable models for open collaboration. For more information, please visit us at linuxfoundation.org.

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The Linux Foundation has registered trademarks and uses trademarks. For a list of trademarks of The Linux Foundation, please see our trademark usage page: https://www.linuxfoundation.org/trademark-usage. Linux is a registered trademark of Linus Torvalds.

MEDIA CONTACT

Jill Lovato
The Linux Foundation
jlovato@linuxfoundation.org