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Alibaba Cloud Announced Progress in Porting Android Functions onto RISC-V

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The company also tops MLPerf Tiny v0.7 Benchmark with its IOT processor

Hangzhou, China, April 20, 2022 – Alibaba Cloud, the digital technologies and intelligence backbone of Alibaba Group, announced it has made further progress in porting basic Android functions onto the RISC-V instruction-set architecture (ISA). This proves the feasibility of using RISC-V based Android devices in scenarios ranging from multimedia to signal processing, device interconnection, and artificial intelligence.

Last year, the company reported it had successfully ported basic functions like chrome browsing in Android 10. Since the initial porting trial, further effort has been invested to rebase previous engineering on Android 12 to enable third-party vendor modules to facilitate new functions, including audio and video playback, WiFi and Bluetooth, as well as camera operation. 

To better facilitate these new functions, Alibaba Cloud has also enabled more system enhancement features such as core tool sets, third-party libraries and SoC board support package on RISC-V, further improving the robustness of the RISC-V ecosystem when running on the Android software stack. 

In addition, Alibaba Cloud successfully trialed the TensorFlow Lite models on RISC-V, supporting AI functions like image and audio classification and Optical Character Recognition (OCR), a development that helps accelerate the incorporation of RISC-V into smart devices.

“The support of Android12, vendor modules and the AI framework on RISC-V based devices is another major milestone that we have achieved,” said Jianyi Meng, Senior Director at Alibaba. “We look forward to further contributing to the RISC-V community with our advanced technology and resources, and encouraging more innovation in the community together with global developers.”

Meng added Alibaba Cloud will open the source codes of related technologies in the near future.

Alibaba Cloud Tops MLPerf Tiny v0.7 Benchmark

Earlier this month, Alibaba Cloud’s Xuantie C906 processor attained firsts in the most recent findings from MLPerf Tiny v0.7, an AI benchmark focusing on IOT devices. The Xuantie C906’s performance excelled in all four core categories – visual wake words, image classifications, keyword spotting, and anomaly detection. The Xuantie C906 is Alibaba’s custom-built processor based on the RISC-V instruction-set architecture.

Xuantie C906’s remarkable performance marks a milestone that showcases the potential of the RISC-V framework in achieving tailored AI functions with extremely low computing power. 

The breakthrough performance in the AIoT area is driven by Alibaba Cloud’s innovation across  hardware and software layers. Alibaba Cloud has improved the computing efficiency by using SinianML, a model optimiser, the Heterogeneous Honey Badger (HHB), the neural network model deployment toolset designed for the RISC-V architecture, and CSI-NN2, the optimised neural network operator library. In addition, Alibaba’s software stack, along with the hardware toolset and library, has optimised AI operators and further improved the performance of the AI inference model, resulting in the Xuantie C906’sexceptional performance.

Alibaba Cloud’s RISC-V based processors have already been deployed widely across a range  of applications including smart home appliances, automotive environments and edge computing. Last year, Alibaba Cloud opened the source code of its XuanTie IP Core series, enabling  developers to access the codes on Github and the Open Chip Community in order to build prototype chips of their own, which can be customised for IoT applications such as networking, gateway and edge servers.

Launched by the open engineering consortium MLCommons, MLPerf™ Tiny benchmark measures how quickly a trained neural network can process new data for the lowest power devices and smallest form factors. MLPerf Tiny v0.7 is the organisation’s second inference benchmark suite that targets machine learning use cases on embedded devices.

“AI for IoT is a highly competitive arena where customisation at every level is critical to achieve new breakthrough results at very low power” said Calista Redmond, CEO of RISC-V International. “Alibaba continues to build RISC-V industry leadership in parallel with their dedication and contribution to the global RISC-V community.”   

“The flexibility of the RISC-V’s framework gives it an advantage in meeting the customisation demands of clients in the AIoT field. We will continue to drive innovation among the thriving RISC-V community, and assist global developers to build their own RISC-V-based chips in a much more cost-effective way,” said Meng. 

CHIPS Alliance Forms F4PGA Workgroup to Accelerate Adoption of Open Source FPGA Tooling

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New workgroup draws support from industry leaders as the open FPGA toolchain matures

SAN FRANCISCO, Feb. 18, 2022 – CHIPS Alliance, the leading consortium advancing common and open source hardware for interfaces, processors and systems, today established the FOSS Flow For FPGA (F4PGA) Workgroup to drive open source tooling, IP and research efforts for FPGAs. 

FPGA vendors such as Xilinx (now part of AMD) and QuickLogic, industrial FPGA users and contributors such as Google and Antmicro, as well as universities including Brigham Young University, University of Pennsylvania, Princeton University and University of Toronto, can now officially collaborate under the umbrella of the newly launched F4PGA Workgroup.

“FPGAs are essential for a wide variety of low-latency compute use cases, from telecoms to space applications and beyond. This new F4PGA toolchain will enable a software-driven approach to building FPGA gateware, making code integration easier than ever,” said Rob Mains, General Manager at CHIPS Alliance. “Under the umbrella of the CHIPS Alliance, this workgroup will help unite current FPGA efforts so academia and industry leaders can collaborate on accelerating open FPGA innovation.”

The initial F4PGA projects are focused around the free and open source FPGA toolchain formerly known as SymbiFlow, as well as the FPGA Interchange Format, which is designed to enable interoperability between open and closed source FPGA toolchains.  CHIPS Alliance’s newest member Xilinx, now part of AMD, collaborated with Google and Antmicro to develop the Interchange Format definition and related tools to provide a development standard for the entire FPGA industry. The FPGA Interchange Format allows developers to quickly and easily move from one tool to another, lowering the barriers to entry for the entire supply chain – from FPGA vendors to academics and FPGA users.

In addition to the work around the FPGA Interchange Format, several CHIPS Alliance members have collaborated on the FPGA tool perf framework. This open FPGA tooling project provides a comprehensive end-to-end FPGA synthesis flow and FPGA performance profiling framework, allowing developers to analyze FPGA designs by looking at metrics such as clock frequency, resource utilization and runtime.

CHIPS Alliance members have also worked on the development of the FPGA Assembly (FASM) format. The FPGA Assembly (FASM) format is a textual format specifying which FPGA feature should be enabled or disabled; the textual nature of FASM makes it easy to analyze and experiment with in different designs.

Industry support for open FPGA tools has continued to rise with QuickLogic becoming the first company to fully embrace the open source FPGA toolchain in 2020, and now with Xilinx’ participation in the FPGA Interchange project. The strong support for the F4PGA Workgroup promises to help further accelerate industry adoption across geographies and increase confidence in open source FPGA tooling as a viable option for all types of designs.

To learn more about the F4PGA Workgroup, please visit: https://chipsalliance.org/workgroups/

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The primary focus is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

CHIPS Alliance Announces Xilinx as its Newest Member 

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Xilinx to continue to drive forward open source FPGA innovation

SAN FRANCISCO, Feb. 3, 2022 – CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today announced that Xilinx, Inc. (NASDAQ: XLNX) has joined the CHIPS Alliance organization. Xilinx is a leader in adaptive computing, providing highly-flexible programmable silicon, enabled by a suite of advanced software and tools to drive rapid innovation across a wide span of industries and technologies – from consumer to cars to the cloud. 

“Xilinx has long been an advocate of open standards and open source,” said Tomas Evensen, CTO Open Source at Xilinx. “As a member of the CHIPS Alliance, we look forward to continuing to spearhead open FPGA initiatives to give everyone the opportunity to innovate faster and do more with their designs.”

Xilinx collaborated with longstanding CHIPS Alliance members Antmicro and Google to develop the FPGA Interchange Format, which helps to lower design barriers by enabling interoperability between open and closed source FPGA toolchains. Xilinx designed its RapidWright open source platform to work with the Interchange Format. RapidWright enables users to customize implementations to their unique challenges and provides a design methodology using pre-implemented modules with a gateway to back-end tools in Vivado. 

“As the inventor of the FPGA, Xilinx is one of the key companies driving forward innovation in this market,” said Rob Mains, General Manager at CHIPS Alliance. “Xilinx has already been working closely with several CHIPS Alliance members around open source efforts, so it’s great to have them under the CHIPS Alliance umbrella as we plan to boost our FPGA efforts this year.”

To learn more about Xilinx, please visit: www.xilinx.com.

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The primary focus is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

SkyWater Technology Joins CHIPS Alliance to Further Efforts to Make Chip Design and Production More Accessible

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SkyWater furthers collaboration with CHIPS Alliance members on open source shuttle projects

SAN FRANCISCO, Sept. 16, 2021 – CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today announced that SkyWater Technology (NASDAQ: SKYT) has become a member of the organization. SkyWater provides custom development, volume manufacturing and advanced packaging services for a wide range of silicon, including solutions based on the free and open RISC-V instruction set architecture (ISA).

“The pace of open source hardware innovation is continuing to heat up. We are proud to have helped make it possible to design, verify and manufacture SoCs that have been entirely developed with open source technologies, from process technology to intellectual property and the automation environment,” said Ross Miller, Vice President, Strategic Marketing & Business Unit at SkyWater Technology. “CHIPS Alliance has already generated strong momentum with its work and we look forward to collaborating with the organization and its membership to take open source innovation to new heights.”

In May 2021, SkyWater and fellow CHIPS Alliance member Efabless launched the chipIgnite program to bring chip design and fabrication to the masses. SkyWater’s open source 130 nm CMOS platform will be used to fabricate chips for the chipIgnite program. The automotive-grade mixed-signal platform is well suited for IoT and edge computing as it is designed to support both digital and analog circuits with embedded non-volatile memory for a wide range of SoC architectures. Open source designs and private commercial designs that include non-open source IP are both eligible to participate in the program. 

The chipIgnite program extends SkyWater’s work with Google, eFabless, Antmicro and the OpenROAD project, among other partners, on the Open MPW Shuttle Program. The multi-project wafer (MPW) program provides fabrication for fully open source projects using SkyWater’s Open Source PDK. Costs for fabrication, packaging, evaluation boards and shipping are covered by Google. During the first round of the shuttle run, called MPW-ONE, 40 open source designs were selected to be fabricated at no cost to designers; 60 percent of those designs were submitted by first-time ASIC designers. The second phase, MPW-TWO, is in progress now and the parts and assembled boards will be shipped to the project owners by the end of the year. 

“The chipIgnite and MPW programs that SkyWater has enabled perfectly align with CHIPS Alliance’s mission to make chip design more accessible, while significantly reducing the cost of creating and fabricating chips,” said Rob Mains, General Manager at CHIPS Alliance. “We are pleased to have SkyWater formally join CHIPS Alliance as we continue to collaborate to break down the barriers of chip design.”

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

CHIPS Alliance and RISC-V International Invite the RISC-V Community to Participate in Updating a New Unified Memory Architecture Standard

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New joint working group will enhance the OmniXtend Cache Coherency architecture

SAN FRANCISCO, March 24, 2020 – RISC-V International, a non-profit corporation controlled by its members to drive the adoption and implementation of the free and open RISC-V instruction set architecture (ISA), and CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today announced a joint collaboration to update the OmniXtend Cache Coherency specification and protocol, along with building out developer tools for OmniXtend.

As part of this collaboration, RISC-V International and CHIPS Alliance have formed a new OmniXtend working group which will focus on creating an open, cache coherent, unified memory standard for multicore compute architectures. The group will update the OmniXtend specification and protocol, build out architectural simulation models and a reference register-transfer level (RTL) implementation, as well as create a verification workbench. These tools for an open, standard unified memory coherency bus leveraging OmniXtend will make it easier for designers to take advantage of OmniXtend for data-centric applications.

“As RISC-V International develops implementation independent specifications and ecosystem components, it is an important priority for us to ensure that whatever we develop will work with emerging and established standards. The joint working group will interact with various RISC-V groups to review the OmniXtend protocol with an emphasis on cache management and paying close attention to coherency enablement for RISC-V members,” said Mark Himelstein, CTO at RISC-V International. “As a result of this joint effort, the RISC-V community will have the tools they need to leverage an open, coherent, unified memory standard for all types of data-centric applications.”

“The newly formed OmniXtend working group will set the standard for open, coherent heterogeneous compute architectures. We plan to allow for a mixture of hardware IP blocks, giving developers more design flexibility so they can choose what works best for their specific application needs,” said Rob Mains, General Manager at CHIPS Alliance. “We encourage the RISC-V community to get involved in this important initiative which will open new design possibilities with OmniXtend.”

Dejan Vucinic of Western Digital will be giving a talk on OmniXtend at the CHIPS Alliance Spring Workshop on March 30, 2021. The event will also cover the AIB chiplet ecosystem, SWeRV Core support, FPGA tooling and much more. To register for this free virtual event, please visit: https://events.linuxfoundation.org/chips-alliance-spring-workshop/register/.

To learn more about the OmniXtend working group, please visit: https://lists.chipsalliance.org/g/riscv-omnixtend-wg.

About RISC-V International

RISC-V is a free and open ISA enabling a new era of processor innovation through open collaboration. Founded in 2015, RISC-V International is composed of more than 1,300 members building the first open, collaborative community of software and hardware innovators powering a new era of processor innovation. The RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.

RISC-V International, a non-profit organization controlled by its members, directs the future development and drives the adoption of the RISC-V ISA. Members of RISC-V International have access to and participate in the development of the RISC-V ISA specifications and related HW / SW ecosystem.

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation    

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

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CHIPS Alliance Welcomes Antmicro and VeriSilicon to the Platinum Membership Level

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CHIPS Alliance continues to grow with more than 25 companies collaborating on open source hardware and software technologies

SAN FRANCISCO, Feb. 11, 2021 – CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today welcomed Antmicro and VeriSilicon to the company’s Platinum membership level. Antmicro, one of the initial members of the CHIPS Alliance, has upgraded to the Platinum membership level to reflect its deepening involvement in the organization. VeriSilicon is new to the CHIPS Alliance, although the company is heavily involved in open source activities. 

“Over the past few years, Antmicro has continued to become more involved in the CHIPS Alliance, helping to steer the technical deliverables and strategic direction of this important organization,” said Michael Gielda, VP Business Development at Antmicro. “We’re deeply committed to furthering the goals of the CHIPS Alliance to realize the vision of open source RTL designs and tooling for silicon and FPGAs.” 

In addition to his role at Antmicro, Gielda is Chair of Outreach at the CHIPS Alliance, helping to drive the marketing, educational and community activities of the organization. Antmicro provides development and commercial support services for open source IP, systems and tools, actively participating in a number of other open source projects and initiatives including RISC-V International, OpenPOWER Foundation, Renode and Zephyr Project. Antmicro is also propelling many of CHIPS Alliance efforts like open source SystemVerilog support and FPGA & ASIC tooling. 

Said Wayne Dai, President and CEO at VeriSilicon: “We have been impressed by the momentum the CHIPS Alliance community has generated over the past two years, and we look forward to helping to drive its next phase of growth and development by joining as a Platinum member.”

In 2018, VeriSilicon was instrumental in establishing the China RISC-V Industry Consortium (CRVIC), which has more than 120 members today. VeriSilicon is also a member of RISC-V International, and is eager to expand its open source efforts by joining the CHIPS Alliance. With the company’s strong growth over the past two decades, the company recently celebrated a new milestone with its entry to the Sci-Tech Innovation Board (STAR Market) of the Shanghai Stock Exchange in China.

“The addition of Antmicro and VeriSilicon to our Platinum membership level demonstrates the growing commitment we’re seeing from companies across the silicon ecosystem,” said Rob Mains, Executive Director at CHIPS Alliance. “As we continue to expand our membership base, we remain laser focused on targeting other parts of ASICs beyond the CPU core, open sourcing the tools needed to work with ASICs, and providing real, battle-proven reference implementations and project infrastructure.”

As Platinum members, Antmicro and VeriSilicon are entitled to appoint a representative to the Governing Board and any Committee. Additionally, a representative of each Platinum member company is eligible to be elected Chair and/or Vice Chair of the Technical Steering Committee (the “TSC”). Furthermore, Platinum members get ten complimentary registrations for CHIPS Alliance workshops and events during the year of membership, along with each company’s logo prominently displayed in CHIPS Alliance online and print materials.

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

CHIPS Alliance Brings on Rob Mains as New Executive Director

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Industry veteran to lead open hardware consortium democratizing silicon innovation

SAN FRANCISCO, Feb. 8, 2021 – CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today announced the appointment of Rob Mains as the organization’s new executive director.

Rob has over 35 years of experience in software engineering and development, with 25 years of experience as an EDA software architect focused on microprocessor design and advanced process node technologies. He most recently served as a technology advisor at Spillbox, and prior to that worked in leadership and senior engineering roles at Qualcomm, Sun Microsystems (staying on at Oracle after the acquisition) and IBM. Throughout his career, Rob has worked closely with hardware developers to play a hands-on role in helping to devise innovative solutions for a wide range of applications.

“Rob is an ideal fit for the CHIPS Alliance with his strong leadership experience and deep understanding of the silicon industry,” said Dr. Zvonimir Bandić, Chairman, CHIPS Alliance. “As the CHIPS Alliance runs full steam ahead with its growing membership, impressive technical milestones and other activities, we look forward to having Rob on board to continue this strong momentum.”

“As more companies are looking to open source solutions to help eliminate design barriers, reduce costs and speed up development time, the CHIPS Alliance will play a critical role in advancing open hardware for the benefit of everyone,” said Mains. “I look forward to working closely with CHIPS Alliance members to continue the organization’s goals, while also focusing on growing the membership base.”

Today the CHIPS Alliance has more than 25 members collaborating to accelerate the creation and deployment of open system-on-chips (SoCs), peripherals and software development tools for a wide range of applications. To learn more, check out the CHIPS Alliance 2020 Annual Report: https://chipsalliance.org/chips-alliance-2020-annual-report/.

About the CHIPS Alliance
The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation
The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

CHIPS Alliance to Collaborate with RISC-V to Standardize an Open Unified Memory Leveraging OmniXtend

By Announcement

CHIPS Alliance to highlight OmniXtend advances at RISC-V Summit 

SAN FRANCISCO, Dec. 8, 2020 – CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today announced that the organization will highlight OmniXtend advances in a presentation at the RISC-V Summit, taking place virtually from Dec. 8-10, 2020. The CHIPS Alliance plans to work with RISC-V International to standardize an open unified memory coherency bus leveraging OmniXtend to foster innovation for data-centric applications. 

“As RISC-V is increasingly being considered for high end data center and enterprise applications, there is a need for seamless cache-coherent sharing memory systems,” said Dr. Zvonimir Bandić, Chairman, CHIPS Alliance, and senior director of next-generation platforms architecture at Western Digital. “CHIPS Alliance is cooperating with RISC-V to standardize on a unified memory fabric and leverage OmniXtend, which allows heterogenous systems that use TileLink cache-coherence protocol to share the memory coherently. We see a unique opportunity because RISC-V is freely open, while other architectures don’t open up the coherency bus, with RISC-V we can create an open unified memory standard to accelerate innovation for data-centric, heterogeneous applications.”

Said Mark Himelstein, CTO at RISC-V International: “ISAs do not stand alone. RISC-V needs a robust ecosystem and the OmniXtend roadmap will enable RISC-V members to create systems that deliver coherent, robust and performant solutions spanning the memory and storage hierarchies.”

Dr. Bandić will be presenting the session “OmniXtend: Open Source Cache-coherence over Ethernet” on Wednesday, Dec. 9 at 12:30 p.m. PT. The session will discuss OmniXtend, a cache-coherency protocol architecture that exports Tilelink cache-coherence messages on the top of L2 ethernet frames. The presentation will report the results of four RISC-V nodes, each running four independent RISC-V harts, connecting via commercial ethernet switch, and establishing a ccNUMA (cache coherent non-uniform memory access) architecture. The session will also highlight a detailed study of local and non-local (i.e. going through ethernet switch) cache access latencies, and propose several software models for OmniXtend-backed architectures.

Omnixtend will also be discussed in another session at the RISC-V Summit, “Building Cache-coherent Scaleout Systems with Omnixtend” with Atish Patra and Tu Dang at Western Digital on Tuesday, Dec. 8 at 3:30 p.m. PT. Atish and Tu will discuss how to provide the necessary support for OmniXtend to build a scalable system with thousands of nodes, since designing, verifying and deploying these scale-out systems in hardware is time consuming. The session will cover a two-fold approach to build and accelerate the development of OmniXtend scale-out systems: an initialization and configuration protocol defining a simple yet race-free approach to setting up multiple OmniXtend nodes during boot, and a software simulation/emulation framework which implements the OmniXtend protocol and an Omnixtend system emulation using Qemu.

The RISC-V Summit will also feature a keynote about the open ecosystem of modern tools, frameworks and platforms that are creating a seamless environment for developers to build advanced ML applications on RISC-V. The session, “Building an Open Edge Machine Learning Ecosystem with RISC-V, Zephyr, TensorFlow Lite Micro and Renode,” will take place on Tuesday, Dec. 8 at 10 a.m. PT and will be moderated by Michael Gielda at Antmicro and feature Tim Ansell at Google, Kate Stewart at the Zephyr Project and Brian Faith at QuickLogic. 

To learn more about the RISC-V Summit, please visit: https://tmt.knect365.com/risc-v-summit/

To register for the RISC-V Summit, please visit: https://riscv.informatech.com/2020/registrations/Attendee

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org. 

Efabless Joins CHIPS Alliance to Accelerate the Growth of the Open Source Chip Ecosystem

By Announcement

Efabless to give a talk on the OpenROAD project at the CHIPS Alliance Workshop on Sept. 17

SAN FRANCISCO, Sept. 15, 2020 – CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today welcomed Efabless, a crowdsourcing design platform for custom silicon, as its latest member. Efabless is already an active participant in several open source initiatives that the CHIPS Alliance is involved in, including the OpenROAD project and the Open Source Shuttle Program.

“The mission of the CHIPS Alliance to democratize silicon design nicely aligns with our focus on changing how chip design is done forever. Our platform is essentially an ecosystem-in-a-box that’s instantly accessible to designers anywhere to create and deliver new chip solutions faster than traditional approaches,” said Mohamed Kassem, co-founder and CTO at Efabless. “Through the CHIPS Alliance and other open source initiatives, we’re working to make it easier for design teams of all sizes to define, develop, collaborate and monetize their work.” 

At the CHIPS Alliance Workshop on Thursday, Sept. 17, Kassem and Andrew Kahng of OpenROAD and UCSD will be presenting the session “OpenROAD open RTL-to-GDS update.” The talk will discuss the OpenROAD autonomous and fully open flow for chip design.

“We’ve been impressed with Efabless’ strong commitment to accelerating open source chip innovation,” said Dr. Zvonimir Bandić, Chairman, CHIPS Alliance. “We look forward to working closely with Efabless and our other members to continue to lower the cost of developing IP and tools for hardware development.”

Efabless is collaborating with SkyWater Technology Foundry  and CHIPS Alliance members Google and Antmicro on an open source SkyWater PDK (Process Design Kit) for the 130 nm CMOS process technology. Efabless will make the design for this PDK simple and affordable by integrating resources on its cloud-based design platform including: an open source based end-to-end ASIC design flow – openLANE based on OpenROAD, Yosys and Magic; the open source striVe family of full ASIC reference designs; and a marketplace for monetizing chip and IP designs. This project will help lower the cost of entry for chip manufacturing, making chip design more accessible for everyone. 

Additionally, Efabless is managing the Open Source Shuttle Program sponsored by Google. This program will provide free of cost chip manufacturing runs for open source designs. The first run is scheduled for November 2020, and another will take place in early 2021.

To check out the schedule for the CHIPS Alliance Workshop and register for this free event, please visit: https://events.linuxfoundation.org/chips-alliance-workshop/program/schedule/.  

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

 

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CHIPS Alliance Welcomes Mentor as its Newest Member

By Announcement

Mentor to present at the virtual CHIPS Alliance Workshop on Sept. 17 

SAN FRANCISCO, Aug. 18, 2020 – CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today announced that Mentor, a Siemens business, has joined as its newest member. The CHIPS Alliance has a roster of more than 20 members collaborating to accelerate the creation and deployment of open system-on-chips (SoCs), peripherals and software tools for a wide range of applications.

“Mentor has a long history of supporting open standards to enable companies to design and verify their solutions,” said Badru Agarwala, general manager of Digital Design and Implementation Solutions at Mentor. “High level synthesis plays an important role in the design of accelerators, and in fostering an open and collaborative hardware development ecosystem. We look forward to contributing to the CHIPS Alliance’s efforts to reduce design barriers for the benefit of the entire silicon ecosystem.”

Mentor is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronic, semiconductor and systems companies. The company recently collaborated with another CHIPS Alliance member, Imperas Software, to extend the hardware design verification of RISC-V cores with industrial quality coverage methodologies. Mentor’s high level synthesis (HLS) tool, Catapult, enables hardware designers to use C++ or SystemC to describe functional intent and move up to a more productive abstraction level.

 “Over the past year we’ve focused on expanding our membership base and achieving new technical milestones as we work to make open source silicon a reality for mobile, computing, consumer electronics and Internet of Things applications,” said Dr. Zvonimir Bandić, Chairman, CHIPS Alliance. “We’re pleased to welcome Mentor to this dynamic, collaborative community driving the new era of hardware innovation.” 

Mentor will be presenting at the CHIPS Alliance Workshop, being held virtually on Thursday, Sept. 17. Mentor’s Anoop Saha will be presenting the session “Open ML Accelerator.” 

To see the full CHIPS Alliance Workshop schedule and register for the event, please visit: https://events.linuxfoundation.org/chips-alliance-workshop/program/schedule/.

To learn more about CHIPS Alliance’s work, please check out the 2020 Annual Report: https://chipsalliance.org/chips-alliance-2020-annual-report/

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

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Note: A list of relevant Siemens trademarks can be found here.