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Announcement

CHIPS Alliance and RISC-V International Invite the RISC-V Community to Participate in Updating a New Unified Memory Architecture Standard

By Announcement

New joint working group will enhance the OmniXtend Cache Coherency architecture

SAN FRANCISCO, March 24, 2020 – RISC-V International, a non-profit corporation controlled by its members to drive the adoption and implementation of the free and open RISC-V instruction set architecture (ISA), and CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today announced a joint collaboration to update the OmniXtend Cache Coherency specification and protocol, along with building out developer tools for OmniXtend.

As part of this collaboration, RISC-V International and CHIPS Alliance have formed a new OmniXtend working group which will focus on creating an open, cache coherent, unified memory standard for multicore compute architectures. The group will update the OmniXtend specification and protocol, build out architectural simulation models and a reference register-transfer level (RTL) implementation, as well as create a verification workbench. These tools for an open, standard unified memory coherency bus leveraging OmniXtend will make it easier for designers to take advantage of OmniXtend for data-centric applications.

“As RISC-V International develops implementation independent specifications and ecosystem components, it is an important priority for us to ensure that whatever we develop will work with emerging and established standards. The joint working group will interact with various RISC-V groups to review the OmniXtend protocol with an emphasis on cache management and paying close attention to coherency enablement for RISC-V members,” said Mark Himelstein, CTO at RISC-V International. “As a result of this joint effort, the RISC-V community will have the tools they need to leverage an open, coherent, unified memory standard for all types of data-centric applications.”

“The newly formed OmniXtend working group will set the standard for open, coherent heterogeneous compute architectures. We plan to allow for a mixture of hardware IP blocks, giving developers more design flexibility so they can choose what works best for their specific application needs,” said Rob Mains, General Manager at CHIPS Alliance. “We encourage the RISC-V community to get involved in this important initiative which will open new design possibilities with OmniXtend.”

Dejan Vucinic of Western Digital will be giving a talk on OmniXtend at the CHIPS Alliance Spring Workshop on March 30, 2021. The event will also cover the AIB chiplet ecosystem, SWeRV Core support, FPGA tooling and much more. To register for this free virtual event, please visit: https://events.linuxfoundation.org/chips-alliance-spring-workshop/register/.

To learn more about the OmniXtend working group, please visit: https://lists.chipsalliance.org/g/riscv-omnixtend-wg.

About RISC-V International

RISC-V is a free and open ISA enabling a new era of processor innovation through open collaboration. Founded in 2015, RISC-V International is composed of more than 1,300 members building the first open, collaborative community of software and hardware innovators powering a new era of processor innovation. The RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.

RISC-V International, a non-profit organization controlled by its members, directs the future development and drives the adoption of the RISC-V ISA. Members of RISC-V International have access to and participate in the development of the RISC-V ISA specifications and related HW / SW ecosystem.

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation    

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

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CHIPS Alliance Welcomes Antmicro and VeriSilicon to the Platinum Membership Level

By Announcement

CHIPS Alliance continues to grow with more than 25 companies collaborating on open source hardware and software technologies

SAN FRANCISCO, Feb. 11, 2021 – CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today welcomed Antmicro and VeriSilicon to the company’s Platinum membership level. Antmicro, one of the initial members of the CHIPS Alliance, has upgraded to the Platinum membership level to reflect its deepening involvement in the organization. VeriSilicon is new to the CHIPS Alliance, although the company is heavily involved in open source activities. 

“Over the past few years, Antmicro has continued to become more involved in the CHIPS Alliance, helping to steer the technical deliverables and strategic direction of this important organization,” said Michael Gielda, VP Business Development at Antmicro. “We’re deeply committed to furthering the goals of the CHIPS Alliance to realize the vision of open source RTL designs and tooling for silicon and FPGAs.” 

In addition to his role at Antmicro, Gielda is Chair of Outreach at the CHIPS Alliance, helping to drive the marketing, educational and community activities of the organization. Antmicro provides development and commercial support services for open source IP, systems and tools, actively participating in a number of other open source projects and initiatives including RISC-V International, OpenPOWER Foundation, Renode and Zephyr Project. Antmicro is also propelling many of CHIPS Alliance efforts like open source SystemVerilog support and FPGA & ASIC tooling. 

Said Wayne Dai, President and CEO at VeriSilicon: “We have been impressed by the momentum the CHIPS Alliance community has generated over the past two years, and we look forward to helping to drive its next phase of growth and development by joining as a Platinum member.”

In 2018, VeriSilicon was instrumental in establishing the China RISC-V Industry Consortium (CRVIC), which has more than 120 members today. VeriSilicon is also a member of RISC-V International, and is eager to expand its open source efforts by joining the CHIPS Alliance. With the company’s strong growth over the past two decades, the company recently celebrated a new milestone with its entry to the Sci-Tech Innovation Board (STAR Market) of the Shanghai Stock Exchange in China.

“The addition of Antmicro and VeriSilicon to our Platinum membership level demonstrates the growing commitment we’re seeing from companies across the silicon ecosystem,” said Rob Mains, Executive Director at CHIPS Alliance. “As we continue to expand our membership base, we remain laser focused on targeting other parts of ASICs beyond the CPU core, open sourcing the tools needed to work with ASICs, and providing real, battle-proven reference implementations and project infrastructure.”

As Platinum members, Antmicro and VeriSilicon are entitled to appoint a representative to the Governing Board and any Committee. Additionally, a representative of each Platinum member company is eligible to be elected Chair and/or Vice Chair of the Technical Steering Committee (the “TSC”). Furthermore, Platinum members get ten complimentary registrations for CHIPS Alliance workshops and events during the year of membership, along with each company’s logo prominently displayed in CHIPS Alliance online and print materials.

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

CHIPS Alliance Brings on Rob Mains as New Executive Director

By Announcement

Industry veteran to lead open hardware consortium democratizing silicon innovation

SAN FRANCISCO, Feb. 8, 2021 – CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today announced the appointment of Rob Mains as the organization’s new executive director.

Rob has over 35 years of experience in software engineering and development, with 25 years of experience as an EDA software architect focused on microprocessor design and advanced process node technologies. He most recently served as a technology advisor at Spillbox, and prior to that worked in leadership and senior engineering roles at Qualcomm, Sun Microsystems (staying on at Oracle after the acquisition) and IBM. Throughout his career, Rob has worked closely with hardware developers to play a hands-on role in helping to devise innovative solutions for a wide range of applications.

“Rob is an ideal fit for the CHIPS Alliance with his strong leadership experience and deep understanding of the silicon industry,” said Dr. Zvonimir Bandić, Chairman, CHIPS Alliance. “As the CHIPS Alliance runs full steam ahead with its growing membership, impressive technical milestones and other activities, we look forward to having Rob on board to continue this strong momentum.”

“As more companies are looking to open source solutions to help eliminate design barriers, reduce costs and speed up development time, the CHIPS Alliance will play a critical role in advancing open hardware for the benefit of everyone,” said Mains. “I look forward to working closely with CHIPS Alliance members to continue the organization’s goals, while also focusing on growing the membership base.”

Today the CHIPS Alliance has more than 25 members collaborating to accelerate the creation and deployment of open system-on-chips (SoCs), peripherals and software development tools for a wide range of applications. To learn more, check out the CHIPS Alliance 2020 Annual Report: https://chipsalliance.org/chips-alliance-2020-annual-report/.

About the CHIPS Alliance
The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation
The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

CHIPS Alliance to Collaborate with RISC-V to Standardize an Open Unified Memory Leveraging OmniXtend

By Announcement

CHIPS Alliance to highlight OmniXtend advances at RISC-V Summit 

SAN FRANCISCO, Dec. 8, 2020 – CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today announced that the organization will highlight OmniXtend advances in a presentation at the RISC-V Summit, taking place virtually from Dec. 8-10, 2020. The CHIPS Alliance plans to work with RISC-V International to standardize an open unified memory coherency bus leveraging OmniXtend to foster innovation for data-centric applications. 

“As RISC-V is increasingly being considered for high end data center and enterprise applications, there is a need for seamless cache-coherent sharing memory systems,” said Dr. Zvonimir Bandić, Chairman, CHIPS Alliance, and senior director of next-generation platforms architecture at Western Digital. “CHIPS Alliance is cooperating with RISC-V to standardize on a unified memory fabric and leverage OmniXtend, which allows heterogenous systems that use TileLink cache-coherence protocol to share the memory coherently. We see a unique opportunity because RISC-V is freely open, while other architectures don’t open up the coherency bus, with RISC-V we can create an open unified memory standard to accelerate innovation for data-centric, heterogeneous applications.”

Said Mark Himelstein, CTO at RISC-V International: “ISAs do not stand alone. RISC-V needs a robust ecosystem and the OmniXtend roadmap will enable RISC-V members to create systems that deliver coherent, robust and performant solutions spanning the memory and storage hierarchies.”

Dr. Bandić will be presenting the session “OmniXtend: Open Source Cache-coherence over Ethernet” on Wednesday, Dec. 9 at 12:30 p.m. PT. The session will discuss OmniXtend, a cache-coherency protocol architecture that exports Tilelink cache-coherence messages on the top of L2 ethernet frames. The presentation will report the results of four RISC-V nodes, each running four independent RISC-V harts, connecting via commercial ethernet switch, and establishing a ccNUMA (cache coherent non-uniform memory access) architecture. The session will also highlight a detailed study of local and non-local (i.e. going through ethernet switch) cache access latencies, and propose several software models for OmniXtend-backed architectures.

Omnixtend will also be discussed in another session at the RISC-V Summit, “Building Cache-coherent Scaleout Systems with Omnixtend” with Atish Patra and Tu Dang at Western Digital on Tuesday, Dec. 8 at 3:30 p.m. PT. Atish and Tu will discuss how to provide the necessary support for OmniXtend to build a scalable system with thousands of nodes, since designing, verifying and deploying these scale-out systems in hardware is time consuming. The session will cover a two-fold approach to build and accelerate the development of OmniXtend scale-out systems: an initialization and configuration protocol defining a simple yet race-free approach to setting up multiple OmniXtend nodes during boot, and a software simulation/emulation framework which implements the OmniXtend protocol and an Omnixtend system emulation using Qemu.

The RISC-V Summit will also feature a keynote about the open ecosystem of modern tools, frameworks and platforms that are creating a seamless environment for developers to build advanced ML applications on RISC-V. The session, “Building an Open Edge Machine Learning Ecosystem with RISC-V, Zephyr, TensorFlow Lite Micro and Renode,” will take place on Tuesday, Dec. 8 at 10 a.m. PT and will be moderated by Michael Gielda at Antmicro and feature Tim Ansell at Google, Kate Stewart at the Zephyr Project and Brian Faith at QuickLogic. 

To learn more about the RISC-V Summit, please visit: https://tmt.knect365.com/risc-v-summit/

To register for the RISC-V Summit, please visit: https://riscv.informatech.com/2020/registrations/Attendee

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org. 

Efabless Joins CHIPS Alliance to Accelerate the Growth of the Open Source Chip Ecosystem

By Announcement

Efabless to give a talk on the OpenROAD project at the CHIPS Alliance Workshop on Sept. 17

SAN FRANCISCO, Sept. 15, 2020 – CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today welcomed Efabless, a crowdsourcing design platform for custom silicon, as its latest member. Efabless is already an active participant in several open source initiatives that the CHIPS Alliance is involved in, including the OpenROAD project and the Open Source Shuttle Program.

“The mission of the CHIPS Alliance to democratize silicon design nicely aligns with our focus on changing how chip design is done forever. Our platform is essentially an ecosystem-in-a-box that’s instantly accessible to designers anywhere to create and deliver new chip solutions faster than traditional approaches,” said Mohamed Kassem, co-founder and CTO at Efabless. “Through the CHIPS Alliance and other open source initiatives, we’re working to make it easier for design teams of all sizes to define, develop, collaborate and monetize their work.” 

At the CHIPS Alliance Workshop on Thursday, Sept. 17, Kassem and Andrew Kahng of OpenROAD and UCSD will be presenting the session “OpenROAD open RTL-to-GDS update.” The talk will discuss the OpenROAD autonomous and fully open flow for chip design.

“We’ve been impressed with Efabless’ strong commitment to accelerating open source chip innovation,” said Dr. Zvonimir Bandić, Chairman, CHIPS Alliance. “We look forward to working closely with Efabless and our other members to continue to lower the cost of developing IP and tools for hardware development.”

Efabless is collaborating with SkyWater Technology Foundry  and CHIPS Alliance members Google and Antmicro on an open source SkyWater PDK (Process Design Kit) for the 130 nm CMOS process technology. Efabless will make the design for this PDK simple and affordable by integrating resources on its cloud-based design platform including: an open source based end-to-end ASIC design flow – openLANE based on OpenROAD, Yosys and Magic; the open source striVe family of full ASIC reference designs; and a marketplace for monetizing chip and IP designs. This project will help lower the cost of entry for chip manufacturing, making chip design more accessible for everyone. 

Additionally, Efabless is managing the Open Source Shuttle Program sponsored by Google. This program will provide free of cost chip manufacturing runs for open source designs. The first run is scheduled for November 2020, and another will take place in early 2021.

To check out the schedule for the CHIPS Alliance Workshop and register for this free event, please visit: https://events.linuxfoundation.org/chips-alliance-workshop/program/schedule/.  

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

 

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CHIPS Alliance Welcomes Mentor as its Newest Member

By Announcement

Mentor to present at the virtual CHIPS Alliance Workshop on Sept. 17 

SAN FRANCISCO, Aug. 18, 2020 – CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today announced that Mentor, a Siemens business, has joined as its newest member. The CHIPS Alliance has a roster of more than 20 members collaborating to accelerate the creation and deployment of open system-on-chips (SoCs), peripherals and software tools for a wide range of applications.

“Mentor has a long history of supporting open standards to enable companies to design and verify their solutions,” said Badru Agarwala, general manager of Digital Design and Implementation Solutions at Mentor. “High level synthesis plays an important role in the design of accelerators, and in fostering an open and collaborative hardware development ecosystem. We look forward to contributing to the CHIPS Alliance’s efforts to reduce design barriers for the benefit of the entire silicon ecosystem.”

Mentor is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronic, semiconductor and systems companies. The company recently collaborated with another CHIPS Alliance member, Imperas Software, to extend the hardware design verification of RISC-V cores with industrial quality coverage methodologies. Mentor’s high level synthesis (HLS) tool, Catapult, enables hardware designers to use C++ or SystemC to describe functional intent and move up to a more productive abstraction level.

 “Over the past year we’ve focused on expanding our membership base and achieving new technical milestones as we work to make open source silicon a reality for mobile, computing, consumer electronics and Internet of Things applications,” said Dr. Zvonimir Bandić, Chairman, CHIPS Alliance. “We’re pleased to welcome Mentor to this dynamic, collaborative community driving the new era of hardware innovation.” 

Mentor will be presenting at the CHIPS Alliance Workshop, being held virtually on Thursday, Sept. 17. Mentor’s Anoop Saha will be presenting the session “Open ML Accelerator.” 

To see the full CHIPS Alliance Workshop schedule and register for the event, please visit: https://events.linuxfoundation.org/chips-alliance-workshop/program/schedule/.

To learn more about CHIPS Alliance’s work, please check out the 2020 Annual Report: https://chipsalliance.org/chips-alliance-2020-annual-report/

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

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Note: A list of relevant Siemens trademarks can be found here.

 

QuickLogic Joins CHIPS Alliance to Expand Open Source FPGA Efforts

By Announcement

QuickLogic to present at the virtual CHIPS Alliance Workshop on Sept. 17 

SAN FRANCISCO, Aug. 11, 2020 – CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today announced that QuickLogic Corporation (NASDAQ: QUIK), a developer of ultra-low power multi-core voice-enabled SoCs, embedded FPGA IP, and Endpoint AI solutions, has joined as its newest member.

“Over the past few years the electronics industry has seen a big shift towards open source hardware and software, and we’re proud to be one of the companies at the forefront of that movement,” said Brian Faith, president and CEO at QuickLogic. “We have already been working closely with several CHIPS Alliance members to make FPGA tools and devices more accessible, and we look forward to continuing these efforts as an official member of the organization.”

QuickLogic recently announced the QuickLogic Open Reconfigurable Computing (QORC) initiative to broaden access to open FPGA technology for embedded systems developers. QuickLogic’s initial open source development tools, developed in collaboration with CHIPS Alliance members Antmicro and Google, include complete support for QuickLogic’s EOS S3 low power voice and sensor processing MCU with an integrated embedded FPGA (eFPGA), and its PolarPro 3E discrete FPGA family. 

Additionally, QuickLogic and Antmicro launched the first fully open source Arm Cortex M4 MCU + eFPGA SoC dev kit, QuickFeather™. Antmicro added support for the QuickFeather dev kit into the Zephyr Real Time Operating System (RTOS), as well as in its open source Renode simulation framework. This small form factor development board is ideal for low-power machine learning (ML) capable IoT devices.

Said Dr. Zvonimir Bandić, Chairman, CHIPS Alliance: “The CHIPS Alliance is continuing to focus on expanding its member base with organizations from a diverse set of industries. QuickLogic, a leader in open source eFPGA IP and FPGA tooling, will help us drive innovation in the FPGA sector and further our mission to remove barriers for open hardware design.”

QuickLogic’s Brian Faith will present “Open Source FPGA Tooling, Our Journey from Resistance to Adoption” at the CHIPS Alliance Workshop, being held virtually on Thursday, September 17.

To see the full CHIPS Alliance Workshop schedule and register for the event, please visit: https://events.linuxfoundation.org/chips-alliance-workshop/program/schedule/.

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

 

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CHIPS Alliance Announces AIB 2.0 Draft Specification to Accelerate Design of Open Source Chiplets

By Announcement

AIB reduces design barriers, costs, and leverages generators to ease development of  chiplet-based designs

SAN FRANCISCO, July 16, 2020 – CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today announced that it has released the Advanced Interface Bus (AIB) version 2.0 draft specification on GitHub. The AIB standard is an open-source, royalty-free PHY-level standard for connecting multiple semiconductor die within the same package. AIB is ideal for designing SoCs, FPGAs, SerDes chiplets, high-performance ADC/DAC chiplets, optical networking chiplets and more. 

AIB 2.0 has more than six times the edge bandwidth density of AIB 1.0 through increases in the per-wire line rate and the number of IOs per channel. Additionally, with smaller microbumps AIB 2.0 can use as little as half of the current microbump array area. AIB makes it easier for designers to connect chiplets so companies can mix foundries, process nodes, IP sources, etc. for more flexibility in designing highly-integrated semiconductor devices. 

“The AIB 2.0 draft standard continues the CHIPS Alliance’s efforts to provide comprehensive design resources to simplify hardware design and reduce development costs,” said Dr. Zvonimir Bandić, Chairman, CHIPS Alliance. “As companies increasingly rely on chiplets to keep up with the latest computing requirements and workloads for different applications, AIB will make it easier to integrate silicon IP with other chiplets into a single device to deliver new levels of functionality and optimization.”

The CHIPS Alliance and its members are working together to help foster the growth of an industry ecosystem which engenders more device innovation via heterogeneous integration. With broader adoption and support for AIB-enabled chiplets, developers can go beyond the limits of traditional monolithic semiconductor manufacturing to leverage the ideal process node for each function in their design while lowering development costs. The AIB specification is already in use by leading semiconductor companies, and has also been adopted by DARPA’s Common Heterogeneous Integration and IP Reuse Strategies (CHIPS) program.

To further reduce the design effort of producing block variants and porting custom blocks to a new process, Blue Cheetah Analog Design, Inc. has developed agile, process portable, and parameterizable generators for the AIB die-to-die interface. Blue Cheetah’s AIB PHY Generator enables the rapid generation of sign-off ready AIB custom blocks (i.e. netlist, GDS, LEF, LIB, and behavioral models) across a multitude of process design kits (PDKs).

“Reducing barriers to entry in developing custom silicon will be critical for the growth, adoption, and success of the chiplet movement,” said Dr. Krishna Settaluri, CEO, Blue Cheetah Analog Design. “By producing custom blocks at push-button speed, Blue Cheetah’s generators drastically reduce time-to-market and engineering effort required to produce tape-out ready IP. We are excited to offer this capability and look forward to enabling companies to thrive in the chiplet ecosystem.”

Dr. Settaluri of Blue Cheetah and David Kehlet of Intel® Corporation will be discussing the AIB PHY generator and AIB 2.0 draft specification at DAC 2020, which is being held virtually this year. The session, called “Tutorial 10 Part 1: Chiplet Integration: Tools, Methodology, Requirement, Infrastructure,” will take place on Monday, July 20 at 1:30 p.m. PT. To learn more about the talk, please visit here

To read the AIB specification, please visit: https://github.com/chipsalliance/AIB-specification.

To check out the AIB PHY Generator, please visit: https://github.com/chipsalliance/aib-phy-generator

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

 

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CHIPS Alliance’s Newly Enhanced SweRV Cores Available to All for Free

By Announcement

CHIPS Alliance to host online event to help community innovating with SweRV Core EH2 and EL2 Solutions

SAN FRANCISCO, May 14, 2020 – CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today announced new enhancements to the SweRV Core™ EH2 and SweRV Core EL2, developed for the open-source community by Western Digital. Since the introduction of the cores earlier this year, the CHIPS Alliance has worked with its community to exhaustedly validate the cores through a transparent and rigorous process, as well as incorporate a variety of new updates.

The SweRV Core EH2, the world’s first dual-threaded, commercial, embedded RISC-V core, is designed for embedded devices supporting data-intensive edge, artificial intelligence (AI) and Internet of Things (IoT) applications. SweRV Core EL2 is an ultra-small, ultra-low-power RISC-V core optimized for applications such as state-machine sequencers and waveform generators. The newly updated cores are now available to everyone for free.

CHIPS Alliance will host an online event to discuss the SweRV Core EH2 and EL2, along with the available software support and solutions for programmers on May 20, 2020 at 5:30 p.m. PT. The event will feature talks from representatives of Antmicro, CHIPS Alliance, Codasip, Metrics and Western Digital.

“Our work to help bring the newly enhanced SweRV Core EL2 and EH2 to the open hardware community demonstrates key progress towards our goal of accelerating RISC-V innovation. We’ve already seen significant industry interest in the SweRV Core EH1 and are pleased to offer two compelling additional options to engineers designing IoT, consumer, mobile and other embedded applications,” said Dr. Zvonimir Bandić, Chairman, CHIPS Alliance.

To register for the CHIPS Alliance virtual event on May 20, please visit: https://zoom.us/webinar/register/WN_fbjiN5uvSuGbGdWUGlI65g.

To learn more about the SweRV Cores, please visit: https://github.com/chipsalliance/Cores-SweRV.

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

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Intel joins CHIPS Alliance to promote Advanced Interface Bus (AIB) as an open standard

By Announcement

Open development for SOCs gets major boost with new collaboration

SAN FRANCISCO, Jan. 22, 2020 /PRNewswire/ — CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today announced industry leading chipmaker Intel as it’s newest member. Intel is contributing the Advanced Interface Bus (AIB) to CHIPS Alliance to foster broad adoption. 

CHIPS Alliance is hosted by the Linux Foundation to foster a collaborative environment to accelerate the creation and deployment of open SoCs, peripherals and software tools for use in mobile, computing, consumer electronics and Internet of Things (IoT) applications. The CHIPS Alliance project develops high-quality open source Register Transfer Level (RTL) code and software development tools relevant to the design of open source CPUs, SoCs, and complex peripherals for Field Programmable Gate Arrays (FPGAs) and custom silicon. 

Intel is joining CHIPS Alliance to share the  Advanced Interface Bus (AIB) as an open-source, royalty-free PHY-level standard for connecting multiple semiconductor die within the same package. This effort is intended to encourage an industry environment in which silicon IP can be developed using any semiconductor process as a “chiplet,” and easily integrated with other chiplets into a single device to deliver new levels of functionality and optimization. Broader adoption and support for AIB-enabled chiplets will help device developers grow beyond the limits of traditional monolithic semiconductor manufacturing and reduce the cost of development. Working together, Intel and CHIPS Alliance will encourage the growth of an industry ecosystem which engenders more device innovation via heterogeneous integration.

The AIB specifications and collateral will be further developed in the Interconnects workgroup.  The group will begin work imminently to make new contributions to foster increased innovation and adoption.  All AIB technical details will be placed in the CHIPS Alliance github. In addition, Intel will have a seat on the governing board of CHIPS Alliance. Go to www.chipsalliance.org to learn more about the organization or to join the workgroup mailing list.  

“We couldn’t be more happy to welcome Intel to CHIPS Alliance.” said Dr. Zvonimir Bandić, Chairman, CHIPS Alliance, and senior director of next-generation platforms architecture at Western Digital.   “Intel’s selection of CHIPS Alliance for the AIB specifications affirms the leading role that the organization impacts for open source hardware and software development tools. We look forward to faster adoption of AIB as an open source chiplet interface.”  

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

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