CHIPS Alliance Announces AIB 2.0 Draft Specification to Accelerate Design of Open Source Chiplets

By July 16, 2020Announcement

AIB reduces design barriers, costs, and leverages generators to ease development of  chiplet-based designs

SAN FRANCISCO, July 16, 2020 – CHIPS Alliance, the leading consortium advancing common and open hardware for interfaces, processors and systems, today announced that it has released the Advanced Interface Bus (AIB) version 2.0 draft specification on GitHub. The AIB standard is an open-source, royalty-free PHY-level standard for connecting multiple semiconductor die within the same package. AIB is ideal for designing SoCs, FPGAs, SerDes chiplets, high-performance ADC/DAC chiplets, optical networking chiplets and more. 

AIB 2.0 has more than six times the edge bandwidth density of AIB 1.0 through increases in the per-wire line rate and the number of IOs per channel. Additionally, with smaller microbumps AIB 2.0 can use as little as half of the current microbump array area. AIB makes it easier for designers to connect chiplets so companies can mix foundries, process nodes, IP sources, etc. for more flexibility in designing highly-integrated semiconductor devices. 

“The AIB 2.0 draft standard continues the CHIPS Alliance’s efforts to provide comprehensive design resources to simplify hardware design and reduce development costs,” said Dr. Zvonimir Bandić, Chairman, CHIPS Alliance. “As companies increasingly rely on chiplets to keep up with the latest computing requirements and workloads for different applications, AIB will make it easier to integrate silicon IP with other chiplets into a single device to deliver new levels of functionality and optimization.”

The CHIPS Alliance and its members are working together to help foster the growth of an industry ecosystem which engenders more device innovation via heterogeneous integration. With broader adoption and support for AIB-enabled chiplets, developers can go beyond the limits of traditional monolithic semiconductor manufacturing to leverage the ideal process node for each function in their design while lowering development costs. The AIB specification is already in use by leading semiconductor companies, and has also been adopted by DARPA’s Common Heterogeneous Integration and IP Reuse Strategies (CHIPS) program.

To further reduce the design effort of producing block variants and porting custom blocks to a new process, Blue Cheetah Analog Design, Inc. has developed agile, process portable, and parameterizable generators for the AIB die-to-die interface. Blue Cheetah’s AIB PHY Generator enables the rapid generation of sign-off ready AIB custom blocks (i.e. netlist, GDS, LEF, LIB, and behavioral models) across a multitude of process design kits (PDKs).

“Reducing barriers to entry in developing custom silicon will be critical for the growth, adoption, and success of the chiplet movement,” said Dr. Krishna Settaluri, CEO, Blue Cheetah Analog Design. “By producing custom blocks at push-button speed, Blue Cheetah’s generators drastically reduce time-to-market and engineering effort required to produce tape-out ready IP. We are excited to offer this capability and look forward to enabling companies to thrive in the chiplet ecosystem.”

Dr. Settaluri of Blue Cheetah and David Kehlet of Intel® Corporation will be discussing the AIB PHY generator and AIB 2.0 draft specification at DAC 2020, which is being held virtually this year. The session, called “Tutorial 10 Part 1: Chiplet Integration: Tools, Methodology, Requirement, Infrastructure,” will take place on Monday, July 20 at 1:30 p.m. PT. To learn more about the talk, please visit here

To read the AIB specification, please visit: https://github.com/chipsalliance/AIB-specification.

To check out the AIB PHY Generator, please visit: https://github.com/chipsalliance/aib-phy-generator

About the CHIPS Alliance

The CHIPS Alliance is an organization which develops and hosts high-quality, open source hardware code (IP cores), interconnect IP (physical and logical protocols), and open source software development tools for design, verification, and more. The main aim is to provide a barrier-free collaborative environment, to lower the cost of developing IP and tools for hardware development. The CHIPS Alliance is hosted by the Linux Foundation. For more information, visit chipsalliance.org.

About the Linux Foundation

The Linux Foundation was founded in 2000 and has since become the world’s leading home for collaboration on open source software, open standards, open data, and open hardware. Today, the Foundation is supported by more than 1,000 members and its projects are critical to the world’s infrastructure, including Linux, Kubernetes, Node.js and more. The Linux Foundation focuses on employing best practices and addressing the needs of contributors, users, and solution providers to create sustainable models for open collaboration. For more information, visit linuxfoundation.org.

 

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